1. Field of the Invention
This invention relates generally to a method of providing a dual layer masking or encapsulation coating for a III-V compound semiconductor substrate and for providing metallized contacts therefor and, more particularly, to a method for providing dual layers of silicon and silicon nitride to operate as a mask or encapsulation coating for a III-V compound semiconductor substrate and for thereafter applying metallized contacts to the III-V compound semiconductor substrate.
2. Description of the Prior Art
It is well known in the art to use silicon dioxide or silicon nitride coatings as a dielectric diffusion mask coating for III-V compound semiconductors. However, the coefficient of thermal expansion for these coatings may differ substantially depending upon the deposition conditions from that of the III-V compound semiconductors thereby resulting in problems associated with interfacial stress or cracking of the coatings during thermal treatment. The silicon dioxide or silicon nitride coatings may be deposited on the III-V semiconductor compounds using a high temperature chemical vapor deposition (CVD) or a low temperature plasma enhanced chemical vapor deposition (PECVD) process. In the high temperature chemical vapor deposition process, the temperatures required to achieve the requisite chemical reactions are often in the order of 700.degree. C. to 1,000.degree. C. III-V compound semiconductors such as gallium arsenide and indium phosphide thermally decompose at such temperatures resulting in one or more components from the decomposed III-V compound being incorporated in the silicon dioxide or silicon nitride coating. The semiconductor properties are altered and the unwanted components of the III-V compound semiconductor may thereafter affect subsequent device processes such as the application of metallized contacts.
The alternate (PECVD) procedure for depositing dielectric mask coatings on III-V compound semiconductors offers the primary advantage of the ability to grow the dielectric mask coatings at relatively low temperatures usually well under 300.degree. C. However, this advantage is offset by the loss in the compositional control of the dielectric material. The coatings may be randomly bonded, highly cross linked in a variable composition. Chemical species other than the desired ones are often included in the dielectric mask coatings. Thus, in (PECVD) films, a range of stoichiometry is possible depending on the plasma and operating conditions; and this variation in the stoichiometry generally results in undersirable variations in electrical, mechanical and chemical properties of the deposited dielectric mask coating leading to poor coating characteristics such as bubbling or cracking.
As a result of these problems, silicon coatings have been used for diffusion masks for III-V compound semiconductors. Silicon coatings, composed of only a single element, are inherently more reproducible. Silicon coatings generally match the thermal coefficients of expansion of the III-V compound semiconductors thereby providing reasonably good performance as a diffusion mask and encapsulation coating. However, difficulties arise when the silicon coatings are subsequently metallized during device processing as a result of the formation of silicides which may be detrimental to device operation.
Therefore, it is a primary object of this invention to provide an improved diffusion mask or encapsulation coating for use with III-V compound semiconductors.
It is a further object of this invention to provide a dual layer mask or encapsulation coating for use with III-V compound semiconductors that maintains the dual advantages of relative impermeability to metallization and the closely matched coefficients of thermal expansion of silicon and III-V compound semiconductors.
Other objects of the invention will be, in part, obvious and will, in part, appear hereinafter. The invention accordingly comprises a mechanism and system possessing the construction, combination of elements and arrangement of parts which are exemplified in the following detailed disclosure.